Responsibilities:

·       Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs for both Serial bus and Parallel bus

·       Develop simulation tools with EDA vendor(s) whenever needed for analysis

工作职责：

·       实施系统并行总线和串行总线仿真，调试和测试

·       开发自动化仿真工具

Requirements:

·       Solid electromagnetic theory background, circuit design/signal processing knowledge is a plus+

·       Familiar with 3D field solver, such as Ansys HFSS or CST Microwave Studio

·       Familiar with 2D circuit solver, such as Synopsys HSpice or Keysight ADS

·       Familiar with script languages like Matlab, VB, python etc.

·       Familiar with PCB Post-SI tool, such as Cadence PowerSI, Mentor Hyperlynx, is a plus

·       Measurements experience, such as Scope and VNA, is a plus

·       Excellent written & oral communication skills in both Chinese and English

·       Good team player and willing to take challenges   

 

技能要求：

·       扎实的电磁场背景，有电路设计或者信号处理知识优先

·       熟悉三维电磁场仿真，如HFSS/CST工具；熟悉二维电路仿真，如Hspice/ADS工具

·       熟悉脚本语言，如Matlab/VB/Python工具

·       具有PCB后分析经验优先， 具有测量经验优先

·       的中英文书面和口头沟通能力

·       良好的团队合作精神，愿意接受挑战

学历：

Educational Background：

Master. EE, CS or relevant Major preferred

硕士，电子，计算机，通讯，自控或相关专业

职位描述：

CHG Enterprise HW Team works on industry leading core switches and routers.  Projects span from high-technology to high-complexity applications.

思科企业级硬件部门专注于业界领先的核心交换机以及路由器产品的开发。项目涵盖前沿技术以及高复杂度应用。

 

We are looking for a signal integrity intern to join SI team for Core switch and routers hardware system development. In this role, you will have the opportunity to work with talents in the engineering team of CHG Enterprise Hardware team, participate Core switch and routers product development and manufacturing.

 

我们正在寻找一名信号完整性实习生加入我们的上海团队进行核心交换机以及路由器硬件系统开发。在此职位上，您将有机会与思科企业级硬件部门工程团队的人才合作，参与核心交换机以及路由器产品开发和制造。