Job Description

We are now looking for a Power Analysis intern:

What you’ll be doing:

Responsible for unit and fullchip level power analysis

 Co-work with design/backend/perf teams for the power data delivery

 Propose/Develop power methodology/flow

 Develop/maintain/enhance environment tools/scripts/makefiles  

What we need to see: 

 In school student, For master or doctor degree in ASIC design or verification

Basic Knowledge for Verilog

Basic Knowledge for C/C++, Makefile

Basic programming skills or Scripting language: TCL, Perl, Python, VBA

Have at least 3 available working days for every week in the future 6+ months.